The present invention relates to a semiconductor device fabrication method.
Shorter channel lengths accompanying increasing micronization of semiconductor devices makes the short channel effect conspicuous. This makes it impossible for MOS transistors to normally operate. As a technique of preventing the short channel effect, semiconductor devices having the extension source/drain structure are recently noted.
In the method for fabricating the semiconductor devices having the extension source/drain structure, a dopant is implanted shallow in a semiconductor substrate with a gate electrode as the mask to thereby form a shallow dopant diffused region, i.e., an extension region, then a sidewall spacer is formed on the side wall of the gate electrode, and then a dopant is implanted in the semiconductor substrate with the gate electrode and the sidewall spacer as the mask to thereby form a deeply dopant diffused region.
It is important that the shallow dopant diffused region, i.e., the extension region has low electric resistance and transversely acute dopant profile. That is, it is important that a dopant is diffused as little as possible in the shallow dopant diffused region.
In forming silicon oxide film forming the sidewall spacer, conventionally the silicon oxide film is formed by, e.g., low pressure thermal CVD at a deposition temperature of, e.g., 620° C., using, e.g., TEOS and O2 as the raw materials.
In forming silicon nitride film forming the sidewall spacer, conventionally the silicon oxide film is formed by, e.g., low pressure thermal CVD at a deposition temperature of, e.g., 700–800° C., using, e.g., DCS (Di-Chloro-Silane (SiH2Cl2) and NH3 as raw materials.
The silicon oxide film and the silicon nitride film have been formed at such high temperatures, because it has been considered that unless the silicon oxide film and the silicon nitride film are formed at such high temperatures, they cannot have good quality. Film forming temperature for forming silicon nitride film of good quality is described in, e.g., Patent Reference 1.
Following references disclose the background art of the present invention.
[Patent Reference 1]
Specification of Japanese Patent Application Unexamined Publication No. 2000-77403
[Patent Reference 2]
Specification of Japanese Patent Application Unexamined Publication No. Hei 11-172439
[Patent Reference 3]
Specification of Japanese Patent Application Unexamined Publication No. 2001-156065
[Patent Reference 4]
Specification of Japanese Patent Application Unexamined Publication No. 2001-156063
[Non-Patent Reference 1]
Brown, W. A. et al.: Solid State Technology/July 1979, p. 51 (1979)
[Non-Patent Reference 2]
David, E. K. et al.: Journal of Applied Physics 77(3), p. 1284 (1995)
However, when the silicon oxide film and silicon nitride film forming the sidewall spacer are formed at the high temperatures described above, a dopant implanted in a shallow dopant diffused region is diffused, which tends to cause the short channel effect. Also, the problem that boron is depleted from the gate electrode, etc., the so-called boron depletion, takes place, which leads to threshold voltage variations, etc. of the transistors.
By plasma CVD, silicon nitride film can be formed at a low temperature of 200–300° C., using SiH4 (monosilane) and NH3 as raw materials (refer to Non-Patent Reference 2). Byplasma CVD, silicon oxide film can be formed also at the low temperature. However, when silicon nitride film, etc. forming the sidewall spacer are formed by plasma CVD, the semiconductor substrate is damaged, and the silicon nitride film, etc. contain hydrogen. When the silicon nitride film, etc. forming the sidewall spacer contains hydrogen, the threshold voltage variation of the transistors is caused. Accordingly, plasma CVD has not been usable in forming the silicon nitride film, etc. forming the sidewall spacer.
In some cases, a cap film or a stopper film is formed of SiN after inter-layer insulation film covering transistors have been formed. In such cases, the cap film or the stopper film must be formed at relatively low temperatures for the prevention of deformation, deterioration, etc. of the inter-layer insulation films. Accordingly, the cap film and the stopper film have been conventionally formed by plasma CVD, which can form films at low temperatures. The silicon nitride film forming the sidewall spacer has been formed by thermal CVD of high temperatures described above. The cap film and stopper film, and the sidewall spacer have not been formed by one and the same semiconductor fabrication system. This has been a barrier factor for decreasing the equipment investment.